性能

线程束执行状态warp execution state

运行 内核线程束 状态可通过多个非互斥的形容词来描述:活跃的(active)、停滞的(stalled)、就绪的(eligible)和已选择的(selected)。

线程束的执行状态通过颜色标识。图表灵感来源于 GTC 2025 的 *CUDA Techniques to Maximize Compute and Instruction Throughput* 演讲。

线程束 从其 线程 开始执行到所有 线程 都从 内核 退出为止,该 线程束 均被认为是 活跃的 (active)。活跃的 线程束 构成了一个资源池,线程束调度器 每个周期从中选择候选者来发射指令(即放入某个发射槽中)。

每个 流式多处理器 (SM) 上活跃的 线程束 最大数量因 架构 而异,具体可参考 NVIDIA 文档 中的 计算能力 章节。例如,在具有 计算能力 9.0 的 H100 SXM GPU 上,每个 SM 最多可容纳 64 个活跃的 线程束(2048 个线程)。需要注意的是,活跃的 线程束 不一定正在执行指令。在上图中,除了一个槽位+周期外,其余所有槽位+周期都有活跃的 线程束 —— 这表明了高 占用率

就绪的 (eligible) 线程束 是指准备好发射下一条指令的活跃的 线程束。要使一个 线程束 变成就绪状态,必须满足以下所有条件:

  • 已获取下一条指令,
  • 所需的执行单元可用,
  • 所有指令依赖关系已解析,并且
  • 无同步屏障阻碍执行。

就绪的 线程束线程束调度器 可以立即进行指令发射的候选对象。在上图中,除了 n + 2 周期之外的所有周期均存在就绪的 线程束。若多个周期内没有就绪的 线程束 可能会对性能造成负面影响,特别是当您主要使用像 CUDA 核心 这样的低延迟算术单元时。

停滞的 (stalled) 线程束 是指因未解决的依赖关系或资源冲突而无法发射其下一条指令的活跃的 线程束线程束 停滞的原因多种多样,包括:

  • 执行依赖,必须等待先前算术指令的结果,
  • 内存依赖,必须等待先前内存操作的结果,
  • 流水线冲突,执行资源当前被占用。

当线程束因访问共享内存或因执行长时间运行的算术指令而停滞时,我们称其停滞在"短计分板(short scoreboard)"上。当因访问 GPU 内存而停滞时,则称为停滞在"长记分板(long scoreboard)"。 这两种停顿都被称为记分板停滞 (Scoreboard Stalls)。

在上图中,每个周期的多个槽位中都出现了停滞的 线程束。停滞的 线程束 本身并不一定是坏事——大量并发停滞的 线程束 可能是 隐藏延迟 所必需的,这些延迟来自长时间运行的指令,如内存加载或像 HMMA 这样的 张量核心 指令,这些指令 可能运行数十个周期

已选择的 (selected) 线程束 是指在当前周期已被 线程束调度器 选中接收指令的就绪 线程束 。每个周期,线程束调度器 都会查看其就绪 线程束 资源池,如果存在任何符合条件的线程束,则选择一个并向其发射一条指令。每个存在就绪 线程束 的周期中,都有一个已选择的 线程束。在 活跃周期 中,某个 线程束 被选中并发射指令的比例就是 发射效率

英文原文(Modal GPU Glossary)

The state of the warps running a kernel is described with a number of non-exclusive adjectives: active, stalled, eligible, and selected.

talk at GTC 2025.](themed-image://cycles.svg)

A warp is considered _active_ from the time its threads begin executing to the time when all threads in the warp have exited from the kernel. Active warps form the pool from which warp schedulers select candidates for instruction issue each cycle (i.e. to be put in one of the issue slots).

The maximum number of active warps per Streaming Multiprocessor (SM) varies by architecture and is listed in NVIDIA's documentation for Compute Capability. For instance, on an H100 SXM GPU with Compute Capability 9.0, there can be up to 64 active warps per SM (2048 threads). Note that active warps are not necessarily executing instructions. There are active warps in all but one slot+cycle in the diagram above — a high occupancy.

An _eligible_ warp is an active warp that is ready to issue its next instruction. For a warp to be eligible, the following must be true:

  • the next instruction has been fetched,
  • the required execution unit is available,
  • all instruction dependencies have been resolved, and
  • no synchronization barriers block execution.

Eligible warps represent the immediate candidates for instruction issue by the warp scheduler. Eligible warps appear on all cycles but cycle n + 2 in the diagram above. Having no eligible warps on many cycles can be bad for performance, especially if you are primarily using lower latency arithmetic units like CUDA Cores.

A _stalled_ warp is an active warp that cannot issue its next instruction due to unresolved dependencies or resource conflicts. Warps become stalled for various reasons including:

  • execution dependencies, i.e. they must wait for results from previous
  • arithmetic instructions,
  • memory dependencies, i.e. they must wait for results from previous memory
  • operations,
  • pipeline conflicts, i.e. the execution resources are currently occupied.

When warps are stalled on variable-latency instructions that don't leave the SM, they are said to be stalled on the "short scoreboard". When warps are stalled on variable-latency instructions which do, they are said to be stalled on the "long scoreboard". Both types of stalls are known as scoreboard stalls.

Stalled warps appear in multiple slots in each cycle in the diagram above. Stalled warps are not inherently bad — a large collection of concurrently stalled warps might be necessary to hide latency from long-running instructions, like memory loads or Tensor Core instructions like HMMA, which can run for dozens of cycles.

A _selected_ warp is an eligible warp chosen by the warp scheduler to receive an instruction during the current cycle. Each cycle, warp schedulers look at their pool of eligible warps, select one if there are any, and issue it an instruction. There is a selected warp on each cycle with an eligible warp. The fraction of active cycles on which a warp is selected and an instruction is issued is the issue efficiency.

相关词条

本词条改编自 Modal GPU Glossary(CC BY 4.0)· 中文翻译 miter6/gpu-glossary-zh,MAE 整理排版。