设备硬件

CUDA 核心CUDA Core

CUDA 核心是执行标量算术指令的 GPU 核心。

H100 流式多处理器（SM）的内部架构图。CUDA 核心和张量核心以绿色显示。请注意张量核心尺寸更大且数量更少。改编自 NVIDIA 的 H100 白皮书。

CUDA 核心需与张量核心区分 —— 后者专门执行矩阵运算。

与 CPU 核心不同，发送给 CUDA 核心的指令通常不是独立调度的。相反，成组的 CUDA Cores 通过线程束调度器同时接收相同指令，但将这些指令应用于不同的寄存器。这些核心组的常见规模为 32（即一个 Warp 的大小），但现代 GPU 也支持最小为 1 线程的分组（但这会牺牲性能）。

"CUDA 核心" 这个术语略有模糊性：在不同的流式多处理器架构中，CUDA 核心可以由不同的单元组成——例如 32 位整数单元、或者是 32 位和 64 位浮点单元的不同混合。或许最好通过与早期 GPU 的对比来理解它们，早期 GPU 包含各种更专业化的计算单元，映射到着色器流水线上（参见 CUDA 设备架构）。

例如，根据 H100 白皮书指出，H100 GPU 的每个流式多处理器 (SM) 都有 128 个 "FP32 CUDA 核心"，这一数字准确统计了 32 位浮点单元的数量，但却是 32 位整数单元或 64 位浮点单元数量的两倍（如上图所示）。为了估算性能，最好直接查看特定操作的硬件单元数量。

英文原文(Modal GPU Glossary)

The CUDA Cores are GPU cores that execute scalar arithmetic instructions.

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They are to be contrasted with the Tensor Cores, which execute matrix operations.

Unlike CPU cores, instructions issued to CUDA Cores are not generally independently scheduled. Instead, groups of cores are issued the same instruction simultaneously by the Warp Scheduler but apply that instruction to different registers. Commonly, these groups are of size 32, the size of a warp, but for contemporary GPUs groups can contain as little as one thread, at a cost to performance.

The term "CUDA Core" is slightly slippery: in different Streaming Multiprocessor architectures CUDA Cores can consist of different units -- a different mixture of 32 bit integer and 32 bit and 64 bit floating point units. They are perhaps best thought of in contrast to early GPUs, which contained a variety of much more specialized compute units mapped onto shader pipelines (see CUDA Device Architecture).

So, for example, the H100 whitepaper indicates that an H100 GPU's Streaming Multiprocessors (SMs) each have 128 "FP32 CUDA Cores", which accurately counts the number of 32 bit floating point units but is double the number of 32 bit integer or 64 bit floating point units (as evidenced by the diagram above). For estimating performance, it's best to look directly at the number of hardware units for a given operation.

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